1. Field of the Invention
This technology relates to a memory x-decoder.
2. Description of Related Art
In nonvolatile memory such as flash memory, the erase operation is applied to memory cells by applying a negative voltage between the word line of the memory cell and the semiconductor body of the memory cell. For example, a negative voltage is applied to the in gate and a positive voltage or ground is applied to the semiconductor body.
Unfortunately, applying a negative voltage to a single word line is nontrivial. Accordingly, it is common for an entire sector of memory cells to be erased in a single erase operation, by applying a negative voltage to all word lines in the sector of memory cells.
It is also common for pre-decoder circuitry to be connected to word lines via a pass transistor and cross-coupled inverters/latch. However, this approach is problematic for low voltage applications, because this intermediate pass transistor results in a transistor threshold voltage drop between the pre-decoder circuitry output and the latch. Given the already limited voltage range of low voltage applications, losing part of the limited voltage range to a transistor threshold voltage drop has a negative impact on performance of the memory, in particular the latch which is connected to the word line.